The Department of Electronics and Communication Engineering in association with IETE Students Chapter, AAACET organized, Five days Faculty Development Programme on “AI driven Semiconductor Device design and modelling for Next Generation Computing Systems” on 3rd to 7th February 2025. External Participants from Karpagam Academy of Higher Education, Coimbatore, Muthayammal Engineering College Autonomous Institution Namakkal, Kalasalingam Academy of Research and Education, SACS MAVMM Engineering College, Madurai , PSR Engineering College, SSM Institute of engineering and technology Dindigul, PSRR College of Engineering, VAIGAI College of Engineering, Madurai registered for the FDP and attended .Internal Participants from various departments of AACET also participated in the FDP. Totally 41 participants attended this FDP.
Mrs.K.Padmapriya AP/ECE welcomed all the participants for the Five days FDP.In the Inaugural address Dr.M.Sekar, Principal insisted the faculty members to attend this kind of FDP to update the latest technologies in their specific domain applying AI principles and disseminate the knowledge gained, among the student community.
The external experts Dr. Suresh Balanethiram, Assistant Professor, NIT, Puducherry, Mr.V. Navaneetha Krishnan, Senior Field Application Engineering, Entuple Technologies Pvt. Ltd. Bengaluru, Karnataka, Dr.P. Sivakumar, Dean SEET, Professor, Department of ECE, Kalasalingam Academy of Research and Education, Krishnankovil, Dr. Vinoth Thyagarjan, Associate Professor, Thiagarajar College of Engineering, Madurai. Dr. G. Dhanabalan, Associate Professor / ECE, Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology, Chennai, Dr. B. Sakthivel, Managing Director, Madurai SM Techno Park Pvt. Ltd., Madurai, Er. A. Sheik Mohamed, Project Coordinator, Madurai SM Techno Park Pvt. Ltd. Madurai delivered lectures and conducted hands-on training in the FDP.
The external experts explored the research areas and advancements in the VLSI device modelling, Cutting-Edge Custom IC Design: A Guide to Cadence EDA Tools, Integrating AI in VLSI Design and Semiconductor process Automation. The internal Experts Dr.T.Senthil HOD/ECE, Mrs. K. Padmapriya, AP/ECE also handled sessions and delivered lectures in the cryogenic CMOS, ML for VLSI Design. The Participations interacted with the experts regarding the problem identification for their research study and softwares needed for the device modelling.
In the Valedictory function Dr.T.Senthil HOD/ECE outlined the Key takeaways from the experts lecture and asked the participants to attend the refresher FDP programme /Workshop to brush up the device modelling skills. Dr.M.Sekar Principal distributed the Participants certificate in the valedictory function. In the feedback session both external and internal participants expressed their appreciation for the FDP arrangements in the relevant design and semiconductor device modelling. Mrs.K.Padmapriya, AP/ECE and Mrs. M. Gayathri, AP/ECE acted as Coordinators for the FDP. Mrs. M. Gayathri, AP/ECE delivered a vote of thanks and the 5 days-long FDP was ended by concluding remarks of Dr.T.Senthil HOD/ECE, followed by the National Anthem.
